Cadence Design Systems
As a Software Engineer II at Cadence Design Systems, I work on the core native C code generation engine powering Perspec System Verifier, a platform used for semiconductor functional verification. My work focuses on building reliable, optimized, and scalable code generation pipelines that translate Portable Stimulus Standard (PSS) verification models into production-grade C test programs, enabling faster and more efficient chip validation for leading semiconductor companies.
- Core Code Generation Engine: Contribute to the development and enhancement of the low-level C code generation engine, transforming high-level PSS (Portable Stimulus Standard) models into optimized C test programs for semiconductor verification.
- Engine Reliability & Correctness: Resolve complex issues across the generation pipeline, including incorrect code generation, array boundary violations, null pointer dereferences, and redundant code emission, improving the correctness, robustness, and maintainability of generated code.
- Code Optimization: Optimize generated C code for bare-metal execution environments by reducing unnecessary variables, simplifying control flow, minimizing code size, and ensuring compliance with strict GCC compilation standards (
-Werror). - Architecture & Scalability: Refactor and enhance core generation components to improve the scalability, modularity, and maintainability of the code generation architecture while efficiently supporting increasingly complex verification models.
- Systems Engineering: Apply core systems programming principles — including performance optimization, memory management, debugging, code quality, and native C/C++ development — to deliver high-performance and reliable code generation solutions.
TECHNOLOGIES